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Intel Corporation - Advanced Digital SoC Design Integration Engineer

Advanced Digital SoC Design Integration Engineer

Job Description
The Role:
In this role you will be part of the Advanced Design Team (AD) which is focused on pathfinding and development of advanced memory and circuit design technologies that enable best-in-class memory collateral and IP that are implemented in product designs across all generations of Intel's process technology.
About the team:
AD resides within Intel's larger Design Enablement (DE) which offers a broad scope of design and foundry services to internal and external partners. At Intel, DE is a key pillar enabling the rapid delivery of products to the marketplace that pushes the envelope of what is possible in SoC and computer hardware design. Your work in this integrated environment will directly enable design teams to not just develop innovative technologies, but to deliver them ahead of the competition and with the same high-quality Intel is known and the market demands.
The Person:
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

Qualifications

You must possess the minimum qualifications listed below to interview for this position. Preferred qualifications are not required, but may give you an advantage in the interview process.

Minimum:
  • Bachelor's Degree in Electrical and/or Computer Engineering with 2 + years of professional work experience.
  • Master's Degree in Electrical Engineering and/or Computer Engineering
OR
  • Ph.D. in the same disciplines.

Experience must in the following areas:
  • ASIC design flow from synthesis to tape-out
  • Reading and understanding RTL functionality
  • EDA tools and flows using Cadence and Synopsys for digital SoC design
  • At least one of the two following: SPICE simulation or RTL validation

Preferred:
  • Automated Placement and Route (APR) using Cadence or Synopsys EDA tools
  • Static Timing Analysis (STA) using Cadence or Synopsys EDA tools
  • SoC design with MBIST
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.


Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.


Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.